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Founder & CEO

Sivakumar P R is the Founder and CEO of Maven Silicon. He is responsible for the company's vision, business, and technology. Sivakumar is a seasoned engineering professional who has worked in various fields, including electrical engineering, academia, and semiconductors for more than 25 years. Before founding Maven Silicon, he worked in the top EDA companies Synopsys, Cadence and Siemens EDA as a verification consultant.

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RISC-V

RISC-V RV32I Assembly – Multiplication | Maven Silicon

This video shows how we can implement the Multiplication using add and shift RV32I instructions. RISC-V is growing rapidly, follow this RISC-V video blog series to obtain know...
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RISC-V

RISC-V RV32I RTL Architecture | Maven Silicon

This video explains the RTL architecture of an RV32I RISC-V processor. Also, it shows how we can create the RISC-V RTL using basic building blocks like the adder, decoder, mem...
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Newsletters

Newsletter April 2021

We had a successful year 2020, as we were able to support our corporate customers and VLSI trainees using our cloud-based online training solutions. We are proud to inform you...
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RISC-V

RISC-V RV32I Instructions Format | Maven Silicon

This video explains all RV 32I Instruction formats, R, I, S, B, J, and U types, and how it simplifies the instruction decoder logic....
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RISC-V

RISC-V Application to Machine Language

This video explains how a RISC-V processor executes all the software applications written in the high-level language in terms of its machine language....
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RISC-V

RISC-V Execution Stages | Maven Silicon

This video explains the execution stages of a RISC-V processor and how it executes all the instructions....
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VLSI Industry

Fearless Chip Forecasts for 2021 from Semiconductor Engineering

We are delighted to collaborate with RISC-V and empower the engineering community to innovate and create new and powerful chips, primarily using open source solutions. ...
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RISC-V

RISC-V CPU Performance | Maven Silicon

We are delighted to collaborate with RISC-V and empower the engineering community to innovate and create new and powerful chips, primarily using open source solutions. ...
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VLSI Industry

Hard-To-Hire VLSI Engineers | A Perspective

We are delighted to collaborate with RISC-V and empower the engineering community to innovate and create new and powerful chips, primarily using open source solutions. ...
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Newsletters

Newsletter January 2021

We had a successful year 2020, as we were able to support our corporate customers and VLSI trainees using our cloud-based online training solutions. We are proud to inform you...
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VLSI Industry

Maven Silicon – a RISC-V Training Partner

We are delighted to collaborate with RISC-V and empower the engineering community to innovate and create new and powerful chips, primarily using open source solutions. ...
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VLSI Training

Importance of Internship for Engineering Students

Every university/college is making the internship mandatory and asking their UG students to do it while doing the engineering course itself. However, it used to be only for th...
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Newsletters

Newsletter August 2020

The world in the last quarter has seen a massive change with a significant impact on businesses. Needles to say, the Learning and Development Industry has taken this challenge...
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VLSI Industry

Maven Silicon featured in Business India Magazine

Business India magazine interviewed our Founder and CEO Mr. P R Sivakumar, VP Mr. Catakam Kumar, and our alumnus, and published this article meritoriously. It beautifully nar...
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Verification

SystemVerilog – Class based Verification environment

This video explains why we prefer Object Oriented Programming to create the class-based verification environment in SystemVerilog and the......
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Verification

Verification IP Vs Testbench

Anyone can create a testbench and verify the design, but it can’t be simply reused as a verification IP. Most of the module/IP level testbenches are used once to verify the ...
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VLSI Industry

Where are we heading in the Semiconductor business?

I am glad to address this question and explain to those who might always be wondering and asking everyone in the industry ‘Where are we heading?’...
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Verification

Code Coverage

Though we use both code and functional coverage to sign-off the design verification, they are not the same. So, you need to understand what is code coverage and how it is used...
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Verification

Is it worth learning SystemVerilog in college itself?

It’s definitely worth it, but not mandatory to get into the semiconductor industry. SystemVerilog is the most preferred language for the IP & Sub-system verification that de...
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Verification

How do I get a job in ASIC/FPGA verification?

As a verification engineer, you should be good at finding bugs in the design and disproving the designer, while verifying and proving the design [DUT/DUV] functionality as per...
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Verification

SystemVerilog OOP – Polymorphism

This video explains how we use Object Oriented Programming feature Polymorphism to create SystemVerilog testbench which can generate various random test scenarios to verify th...
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